Power factor correction (PFC)is frequently required in the power supplies of electronic equipment fed from AC lines, and likewise in line-derived lighting systems. A power factor correction circuit changes the waveform of current drawn by the power supply to improve the power factor. The purpose is to attempt to make a power supply appear as a purely resistive load, representing a power factor of 1. In practise, it is extremely difficult to achieve a unity power factor. Nonetheless, a power factor above 0.9 or 0.95 is routinely demanded by systems integrators, standards agencies and legislation.
An example of a typical configuration for a switching mains power supply, as illustrated in FIG. 1, accepts a mains supply voltage 2 as an input to a power factor correction circuit 6. The power factor correction circuit may be preceded by an input circuit 4. This input circuit 4 may provide protection features, such as surge protectors and fuses may be provided between the mains supply and the Power Factor Correction Circuit. Similarly, the input circuit may provide filtering for EMI. A user operable switch (not shown) may also be provided allowing a user to switch the mains supply on or off as desired. The output from the PFC circuit is a quasi-DC voltage. The output is a quasi DC voltage as it comprises a DC component with a ripple. The quasi-DC voltage output from the PFC circuit is typically between 400 and 420 volts. A DC-DC converter 10 employing a transformer 12 (where isolation is required) may be provided to convert this relatively high voltage to a working voltage for the subsequent electronic equipment 14 being powered by the power supply. Whilst a high power factor is generally required, equally the power supply designer must meet other requirements including for example, cost, efficiency, safety and EMI performance.
There are two general approaches in the Prior art to power factor correction. In the first approach, the incoming AC mains supply is rectified and the Power Factor circuit correction works upon the rectified AC mains typically as a switching converter having a boost topology. An alternative approach, as shown in FIG. 2, integrates the rectification function and the switching converter function.
In this alternative approach, an AC-side inductor 20 is provided with an AC-side switch 22 coupled to a diode bridge 24, 26, 28, 30 as outlined in Pelly U.S. Pat. No. 5,047,912. The AC-side switch has historically consisted of parallel connected thyristors 34, 36 (for example as disclosed in Depenbrock U.S. Pat. No. 3,906,337 and as shown in FIG. 2(b)) and more recently series-connected MOSFET elements 38, 40 as provided for (as shown in FIG. 2C) or reverse-blocking IGBTs. The inductor 20 is periodically charged by turning “on” switch 22 for a small time period. When the switch 22 is turned off, the inductor current continues to flow. The current flow is no longer through the switch 22 but rather through one of the diode pair combinations 24, 30 or 26, 28 depending on the polarity of the half mains cycle of the input voltage, to a capacitor 32 (referenced as 8 in FIG. 1). When series-connected MOSFET devices are employed, both devices can be ON during the relevant switching period, thus reducing losses that would otherwisearise from current flowing through the body-diode of one of the devices.
The normal goal with power factor correction—i.e. obtaining a high power factor—may be seen generally to translate into having input current proportional to input voltage. As the input voltage is nominally sinusoidal, any control scheme employed seeks to ensure that the current is proportional to the instantaneous input voltage, with the proportionality factor determined by a voltage error loop controlling the voltage on capacitor 32. It will be appreciated that the value of current may be set arbitrarily by the duration of the switching of switch 22, and that continuous-mode operation may generally be established after a number of switching cycles. Although, continuous mode operation generally requires fast recovery diodes and so a circuit designer may prefer to operate in discontinuous mode. The input current 36, as shown in FIG. 3 essentially corresponds to the inductor current waveform. This representation illustrates, in the expanded section, the current variation 34 expected with a fixed-frequency continuous-mode control approach. Equally, it will be recognised that discontinuous current conditions and/or variable frequency operation may be used as required, and that operating mode may change across the line cycle.
It is generally recognised that the current ripple needs to be minimised in the first instance, and to be filtered in order to avoid potentially interfering signals being put on the line. Indeed a rigorous compliance regimen prevalent in most countries specifies low levels of permissible noise. Both these aspects usually motivate operation at higher frequencies, where the inductor value may be less and as a result the inductor physically smaller. Additionally, when higher frequencies are used for switching, the size of filtering components 4 may also be reduced materially in size.
Unfortunately, whilst operation at higher frequencies is desirable, losses generally increase with frequency. These increased losses are generally associated with switching losses. These losses may include those due to reverse recovery of the “fast” switching diode (24 or 28 in FIG. 2). One solution to this particular loss is to employ a wide-bandgap type of diode, for example a Silicon Carbide diode. Nonetheless, losses can remain quite significant from parasitic capacitances. For example in a converter designed for operation at several hundred watts, the losses may aggregate to a value equivalent to a linear capacitor of perhaps 150 pF. If this is charged to 400V on each occasion when the switch is turned on, the energy loss will approximate the stored energy or 0.5 CV2. Under the conditions mentioned this will amount to 12 μJ per switching cycle, or 1.2 W dissipation at 100 kHz and proportionally higher at higher frequencies. The overlap of voltage and current waveforms may be amenable to some snubbing approaches, but is also a material contributor to losses with this contribution also likely to increase with increasing frequency. Thus whilst circuit designers generally wish to use higher frequencies for reduced component sizes, the losses associated with operation at higher frequencies act as a strong disincentive to do so.